Z80 card for the SS-50 bus

I obtained this SS-50 card and documentation a few years ago, but did not put the two together until May 2019. This Web page last updated Aug 5 2019. copyright Herb Johnson (C) 2019.

[SS-50 Z80]

SSZ-80 from Design Ltd.

The SSZ-80 is a Z80 CPU board, designed for the SS-50 bus, and sold by Design Ltd of New York. The SS-50 bus was developed in 1976 by Southwest Technical Products Corp. or SWTPC, for the 6800 and later 6809 Motorola microprocessors. It was popular in the 70's and into the 80's for Motorola-type processors. Several companies made compatible boards and small systems. To my knowledge, this is the only Z80 CPU product for that bus. It was probably produced in 1977 or 1978.

I"ve searched the Web for publications about the product, discussion, etc. However, "Design Ltd." is pretty common and so is "Z80", so I gave up due to excessive nonproductive search results.

Of course, I photographed the board. I've scanned the manual; Here's the SSZ-80 manual with source listing and schematic. While still in progress, I've reestablished the source as per the manual. See my SS-50 notes below, for an issue in the manual's documentation of the SS-50 bus.

The ROM monitor program, is a 2.0 version of Technical Design Lab's (TDL) "Zapple" monitor. A source listing was in the manual. I found a text file of a similar version (for other hardware) in online archives, and modified it to match the source listing. It's written in TDL's version of Z80 mnemonics for the TDL assembler; an expanded version of Intel 8080 mnemonics. To assemble it today, you either need to run TDL's assembler on a CP/M system (or emulated system), or find a cross-assembler which accepts TDL Z80 codes. See my "TDL notes" for assembly and how I got there.

The board as found, had a few chips missing, which I've replaced. Most of the chips date from 1977 or 1978. The empty ROM sockets are for 2716's (2K X 8 ROMs). The 2K byte monitor should fit in one ROM. Assembled at F000H, that ROM would be in socket U7. There's 1K of RAM on board, at E000H. The monitor expects a console serial UART at I/O locations 4 through 7; If I read the docs correctly, that corresponds to a serial I/O board in card slot 1.

The manual says the SSZ-80 board can work alternatively with the SWTPC 6800 or 6809 CPU board. A number of modifications are apparently needed to the SS-50 backplane and to either of those CPU boards. Also, some redundant chips are removed from the SSZ-80 board. Read the manual and review the schematic for details.

Of course I'll update this Web page and the ASM file, as work is done.

- Herb Johnson

The SS-50 side

There's already a number of SS-50 Web sites, or SWTPC Web sites. So, details on SS-50 6800 & 6809 computers are available. Here's some notes, mostly to help me out. These are probably incorrect, my SS-50 experiences are scarce. And I do have a SWTPC 6800 system I need to work on.

In June 2019, Bob Applegate of Corsham Technologies (SS-50 producer), pointed out that the SS-50 signals on the SS50-Z80 schematic are numbered backwards from SS-50 standard practices. The SS50-Z80 board is inserted on the 50-pin bus, with chip-side "facing "the same way" as other SS-50 boards. [Thanks to Lee Hart for asking this specific question.] But the pin-numbers on the schematic and PC board for the bus pins, are reversed from what became standard. Here's how I came to understand SS-50 bus numbering.

Apparently, when SWTPC designed the first SS-50 boards, they did not establish a SS-50 pin-numbering scheme; they and subsequent board producers, simply followed SWTPC designs. The bus numbering that emerged later, numbers the SS-50 pins from right to left. That is, with a SS-50 board facing you from the component side, the rightmost bus pins (data) number from 1 and up; and the leftmost bus pins (baud rates) number from 50 down. Bob references some bus information that apparently other SS-50 manufacturers followed. Design Ltd. apparently did not follow that practice and numbered from left-to-right.

The 6800 and 6809 do not have an "I/O space" like the Z80 and INtel 8080 processors. So, the Z80's I/O map is wired onto an I/O bus (called SS-30) as part of the 64K data address space. Slot 1 on the I/O bus (Z80 I/O addresses 4-7) is apparently reserved for the serial card. Originally that was the MP-S card, which contains a 6850 UART and current-loop and RS-232 interfaces. Baud rates clocks are generated by the CPU board on the SS-50 (including the SSZ-80). An IRQ from the UART goes to the SS-50 /IRQ line.

The SS-50 supports RAM but part of the upper RAM map, is wired for ROM or for the SS-30 I/O bus. So the first 32K of the 64K address space is available for RAM. Various mods later, supported more memory.

Apparently the DS8835 is an odd bus driver chip; I had to look hard to find a few, and find the data sheet. Here's a DS8835 data sheet for convenience.

The TDL side

Technical Design Labs produced a Z80 assembler before Zilog! That is, before Zilog decided on its mnemonics. And they were first to produce a Z80 CPU board for the S-100 bus; they announced it ready on July 4, 1976. Roger Amidon was the board designer and a programmer and a founder of TDL. He wanted 8080 compatibility for "his" mnemonics; Zilog *deliberately* made all their mnemonics non-Intel, to avoid legal conflicts! So TDL Z80 software - assemblers, linkers, monitors, BASIC - were wrapped around "TDL mnemonics". TDL software was popular for a few years, as were their S-100 products. Versions of the "Zapple" monitor were produced for a number of Z80 products. It was preceeded by the "Apple" monitor for the 8080.

I knew Roger personally, some time later, and some of the other TDL folks. I have some of their original artifacts, disks, code, etc. Check my Web page on the Zapple monitor and other TDL links.

The ROM monitor ASM source is in this file; the listing and the absolute Intel hex files. I visually verified at the byte-level, these are consistent with the PDF of the source: there may still be errors!. The source I've created, doesn't have all the commentary from the SSZ80 manual; it has additional commentary from the other version.

To assemble the source: I used Simon Cran's MYZ80 emulator from z80.eu, to run the TDL CP/M V2.21 assembler. The assembler I obtained from s100computers.com "Assembler collection" under "TDL's Z80 Macro Assembler", here's the link. Here's the TDL Z80 assembler for CP/M and here's the manual and from the manual the CP/M operating notes. But other sites have this or other Z80 emulators, and copies of TDL's assembler.

Copyright © 2019 Herb Johnson

Herb Johnson
New Jersey, USA
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