prototype Membership Card PROM cartridge

Last updated June 28 2012, tweaked Jan 7 2014. Edited by Herb Johnson. Refer to the Membership Card home page for the 1802 Membership card project. An email address is there to order. - Herb Johnson

This is a Web page for a prototype PROM cartridge designed and constructed by Herb Johnson, for the 1802 Membership Card from Lee Hart. The details were discussed with Lee and his comments are included. - Herb

Construction and test of PROMcart - June 2012

A problem with the Membership Card, is to load programs into a RAM-only card. One solution is straightforward: use Q to drive an external binary counter, which successively addresses a PROM through its memory. The 8-bit PROM output is read on the M/S card's eight inputs. No outputs are needed except Q to "count", and possibly a programmed bit to reset the counter. For the latest prototype we manual-reset the counter with a button.

Lee Hart first suggested a simple "loader" could toggle Q and pulse a hardware counter; this was based on earlier discussions I had with him on a PROM reader. Discussion of the first and second prototype are further down this page.. Immediately below is work on the third and most recent prototype. - Herb Johnson

construction of third prototype

[prototype 2 sockets] [prototype 2 pins]

I prepared a DB-25 connector with wire-wrap pins, and used wire-wrap sockets for the ICs. It's not difficult to use a hacksaw to cut the perfboard, a drill to start the hole for the DB-25. The hole was squared offer using a "nibbler" tool. But "oops", I thought the 74LS393's were 16-pin! See this version below. I caught the error after wiring several lines, so not much harm done. Just replaced the sockets with proper 14-pin sockets. The third version is photographed to left and right, with just a few lines wired up. NOte the push button is on the "back" of the board, it will be facing up when mounted on the Membership Card.

I added an LED to +5 volts with a 330 pull down resistor; I plan to connect it to one of the address lines. (Note the LED is on the side of the PC board, so it's visible from either side) When the line is low, it will turn on; off when the line is high. So, it will not only show "reset" (all address lines low), but it will pulse when that address bit is toggled. Just a matter of selecting an address bit that's not too fast or slow.

schematics, reset counter

[prototype 2 schematic] [manual counter reset]

The schematic shows I'm using two 74LS393 dual 4-bit binary counter chips. That gives me 16 bits of address counting, which is the whole 1802 64K address space. the only counter inputs are clear (a high pulse) from OUT 4 bit 7, and count from Q (transition from high to low). "Count" of course is obvious.

"Clear" is needed to reset the counter, a high pulse, the line must be low otherwise. Where can I get an output bit? One of the eight output bits. But it's a lot of work to output a high and a low, to reset the counter programmatically. See this discussion "Resetting the counter" for details. In any event, it's more bytes to toggle into the "bootstrap loader". So by version 3 I removed the "clear" connection back to the M/S card.

I added a push button to manual reset or clear the counter. Generally you'd load the bootstrap once manually. If the ROM needs to be reloaded, it can include it's own loader and reset. A few trial circuits led me to a simple pullup/pulldown resistor pair as shown on the right. A push button pulls up with 330 ohms. The input to clear is pulled down with a 1K resistor, otherwise the LSTTL input would "float" high. A more elaborate circuit would be needed to also support an LSTTL output from the Membership Card output latch; or to reset on power up.

testing program

Here's a version of the program I used to confirm operation of the PROMcart, based on the schematic shown above. It sets a memory address in R3 at 0010H. A loop increments R3 as a memory pointer, reads the PROM and writes it to sequential memory (and to the LED's as an OUT instruction) as Q is toggled. When R3's low byte is zero (the top of the memory page), it breaks the loop and the processor "idles". That's adequate to read 256 counts.

      	ORG 0000 
90    	ghi r0   ; get 00 from R0
B3    	phi r3   ;r3=00XX
F8 10 	ldi 10H  ; low byte load address
A3    	plo r3   ;r3=0020
E3    	sex r3   ; use X->r3 for loading the EPROM contents
7Aloop:	req      ; clear Q
6c  	inp 4    ; read a byte from EPROM, store it at m(r3)
53  	str R3   ; save in location @ R3
64    	out 4	   ; show result on LED's via OUT; auto-increment R3
7B    	seq      ; increment ROM counter with Q for next EPROM address
83    	glo r3   ; get low byte of r3
3A 06 	bnz loop  ; loop until desired number of pages loaded
00    	idl      ; halt (with Q off to show it's done) 

(If the OUT 4 is not desired, say because an output bit will reset the counter, the OUT 4 must be replaced with INC R3 so the loading address is incremented.)

PROM header for testing

[PROM test header]

[prototype 3 w/header]

The header schematic, shows a 24-pin header (plugs into IC socket) as a test PROM substitute. Its wired so A0=D0, A1=D1, etc. So "reading" an address of 00H-FFH with this header in place, produces data that matches the low byte of the address. A photo of the header in the PROM cart is to the right.

initial tests

[ver 3 at 001] [ver 3 at 010]

The photo above shows the "header ROM" and one of the two counter chips plugged in. I wired the card sufficiently to check the lowest 3 bits. I used the load program as shown above for version 3. That program reads in the data byte, stores it in memory, and toggles Q to clock the 74LS393. The program loops through the low page of memory and halts at the start of the next page.

Then I reset the M/S card and examined memory, to 1) confirm the program was not overwritten and 2) to look at the lowest three bits of memory above that program, to verify the loaded data showed a "count" through memory. Remember: the PROM header shows data as equal to the counter address. On the left is the "count" of 001; on the right at the next RAM location, the count 010. Walking up through memory showed the data in count order, confirming the counter is incremented and loaded in RAM.

Tests of this sort establish the details of using a PROM cart. For instance: note all the data switches are set "high". If they were DOWN, then the data inputs are shorted to ground, and all data is zero. I noticed that, when I left one switch down and that data bit was "dark" when I ran through memory. Since in this test the five higher data bits were not wired up, the data in was "high", as there was nothing else driving those inputs "down". Examine the front panel card schematic to explore this explanation.

RS-232 interface

Says Lee Hart: "Connecting Q straight to the RS-232 [for a serial output is not a good idea]. Technically, the standard requires a negative voltage. Some RS-232 receivers will still work with only positive voltage, but some won't. The protection diodes shown on your RS-232 pins should be Schottkys; otherwise they won't [conduct at a lower voltage and] deflect the current away from the 1802's internal protection diodes. Or, move them to the RS-232 side of the 1k resistors, so the protection diode will hog almost all the fault current.

[RS-232 level converter]

I think it's a great idea to include the serial interface. Since RS-232 can have +/12v levels and the connectors have touch-able pins, a fairly robust interface is needed. Here's a good one.

It inverts the data, like most RS-232 drivers, which is what existing 1802 bit-banger programs will assume. Q1 inverts the data received from the PC. Bipolar transistors are pretty much immune from static damage. R1 limits the base current. D1 keeps negative RS-232 voltages from breaking down Q1's base-emitter junction.

The Q output from the 1802 is inverted by Q2. R2 limits its base current. When Q is low, TXD is thus high (whatever supply voltage the Membership Card is running at). When Q is high, Q2 is turned off, and R3 pulls TXD negative. The negative voltage is the idle state of the RXD input from the PC. This means you can't send and receive at the same time, but bit-banger software on the 1802 can't do that anyway. [Positive voltage is borrowed from DTR or RTS.] - Lee Hart

History, design alternatives

The sections below describe earlier prototypes, designs and various code fragments during development and for future consideration. This is a work in progress, and there was work prior to MAKE progress. - Herb Johnson

History: Concept and first prototype

initial design considerations

[proto PROM cart]

Here's the program Lee Hart constructed as a toggle-in "loader": a prototype ROM loader cartridge made by Herb JOhnson is shown to the left.

      	ORG 0000 
90    	ghi r0    ; get 00 from R0
B3    	phi r3   ;r3=00XX
F8 20   	ldi 20H  ; low byte load address
A3    	plo r3   ;r3=0020
E3    	sex r3   ; use X->r3 for loading the EPROM contents
6C  loop: inp 4    ; read a byte from EPROM, store it at m(r3)
7B    	seq      ; increment ROM counter with Q for next EPROM address
60    	irx      ; increment x->r3
93    	ghi r3   ; get high byte of r3
FD 01   	sdi n    ; sub n, number of 256-byte pages to load
7A    	req      ; reset Q for next pass or end
3A 06   	bnz loop  ; loop until desired number of pages loaded
00    	idl      ; halt (with Q off to show it's done) 

[proto PROM cart unwired]

The circuit for the above idea is simple enough, and based on a suggestion by Lee Hart. (A modified version of the schematic is on the left.) Use Q to drive a counter, which successively addresses a PROM through it's memory. The 8-bit PROM output is available and read on the parallel port's eight inputs. "clear" resets both the M/S card and the counter. An NPN transistor inverter to provide the active HIGH reset for the 4040 CMOS counter, from the active low CLEAR to the M/S card. There's a pull-down resistor for the active-low "enable" of the ROM, for an option to provide a high signal for lower-power operation.

Also to be implemented, is a simple interface between a serial line with RS-232 levels for transmit and recieve, and Q for output and an IN bit for input. To avoid overvoltage or negative voltage, each line needs at least a pair of diodes. If an input voltage goes below ground, the diode to ground is forward-biased. Likewise, if the input voltage is above 5 volts, the diode to +5 is forward biased.Currents are limited by the series resistor to the outside world. Otherwise the diodes have no effect.

There's some issues of supporting various PROMS by capacity. If I limit support within the range of 2764's to 27512's (8K to 64K bytes), that's all 28-pin PROMS and so pin 28 is connected to +5. But the 4040 counter only "counts" to 12 address bits - that's 4K bytes. But for initial testing, that's sufficient. A reasonable scheme is to connect the four "port" outputs to the remaining four address lines.

The circuit as constucted, initially followed some of the idea above. But I had trouble making it work. So I simplified the circuit slightly and made a few changes. The changed schematic appears on the left. To reset the counter, I used one of the output lines, that seperated the PROMcart from use of the CLEAR line and switch. To test the circuit and the Membership Card, I constructed a "header", also shown on the schematic, to substitute for the PROM. Address lines A0-A7 are wired to data lines D0-D7; thus the header "reads" the address line values as data.

initial programming software

A test program to load 256 bytes into memory just above the "bootstrap". That tests the counter and the wired up header. A proper loader would set a higher memory address to load the ROM. Of course on reset the 1802 starts at location 0000 with R0 as program counter pointing there.

		ORG 0000 
XXYY		EQU 0010H ;(or other load address above bootstrap

F8 YY   	ldi low XXYY
A3    	plo r3   ; r3 will contain load address
F8 XX 	ldi high XXYY   
B3    	phi r3   ; 
E3    	sex r3   ; use X->r3 for loading the EPROM contents
7A loop: req      ; clear Q
6c    	inp 4    ; read a byte from EPROM, store it at m(r3)
60    	irx      ; increment x->r3
7B    	seq      ; increment ROM counter with Q for next EPROM address
83    	glo r3   ; get low byte of r3
3A 06 	bnz loop  ; loop until end of first page of RAM, enuf to test
00    	idl      ; halt  

A modification of the test program will load a whole ROM as follows;

XXYY		EQU 0013H ;(or other load address above bootstrap)
TTVV		EQU XXYY+?000H; just above highest RAM loading page

		...      ;as above to seq instruction
7B    	seq      ; increment ROM counter with Q for next EPROM address
93    	ghi r3   ; get high byte of r3
FD TT       sdi high TTVV ;D = TT-high(r3)
3A 06 	bnz loop  ; loop until R3 points past highest load page
00    	idl      ; halt  

Construction and Testing prototype 1

[proto PROM cart unwired] Here's the top of the board (component side) with some wiring accomplished. Wire-wrap wire and some wire-wrap sockets were used. But the DB-25 and the PROM socket are ordinary solder-tails. I chose to solder all connections but use a wire-wrap hand tool to make the mechanical connections. This tool is shown in two parts; the long shaft is hand-held and the wire is inserted into the working end. The other part, housed in the handle for storage, is a small stripping tool with a narrow slot to scrape off the insulation. A bundle of precut and stripped wire-wrap wires are shown; I have them in different colors and lengths.

This wrapping and soldering scheme worked well enough during assembly; time will tell if the connections are sound for testing the design.

Testing program, results

[proto PROM cart & header] I used the same testing program for later prototypes. It's explained above with the later versions.

I had a number of difficulties in making the above work, until I simplified the prototype. I wired DB-25 line 10 directly to the counter RESET, and disabled any connection to CLEAR; the interaction with the CLEAR switch and the inverting transistor were a distraction. I also had trouble confirming the program was correct, and data was getting to the memory. On the left, you see the version of the prototype I got to work, with the Membership card and battery pack in view.

Lee Hart suggested after construction; "Since the PROMcart will have male pins, you may want to add some kind of protection to the [CMOS 4040] inputs, so static charges won't blow it from handling." So I went to the 74LS393 in the next prototype, to avoid this problem. - Herb

History: construction of second prototype

[prototype 2 pins] [prototype 2 sockets]

I prepared a DB-25 connector with wire-wrap pins, and used wire-wrap sockets for the ICs. It's not difficult to use a hacksaw to cut the perfboard, a drill to start the hole for the DB-25. The hole was squared offer using a "nibbler" tool. But "oops", I thought the 74LS393's were 16-pin! I caught the error after wiring several lines, so not much harm done. Just replaced the sockets with proper 14-pin sockets.

The schematic of the second version is the same as for the third version and shown above.

Other considerations

Resetting the counter

The counter needs some kind of "reset" signal so it counts from zero. It would likely be a good idea, to do that via an 1802 program, using one of the output bits. The shortest program to reset the counter with a 0-1-0 bit output on bit 7 would be something like this:

	;R3 has load address, X->R3
F8 00		ldi 00H
53		str r3
64		out 4   ;00 out, R3 incr
F8 80		ldi 80H
53		str R3  
64		out 4   ;80 goes out, R3 incr
23		dec R3
23		dec R3  ;R3-->00 again
64		out 4   ;00 goes out, R3 incr
23		dec R3  ;R3 restored	

If X can be set to R0, the program counter, Lee Hart suggests:

----    E0    SEX 0    ; X-->R0
0000    64    OUT 4    ; output port 4, then bump program counter
0001    00    db 0     ;   the value 00 (skipped by PC)
0002    64    OUT 4    ; output port 4
0003    80    db 80h   ;   the value 80 hex 
0004    64    OUT 4    ; output port 4
0005    00    db 0     ;   the value 00  

Lee Hart also suggested a hardware fix, using logic from the CPU board, or timed pulses from Q:

"You can also use the front panel CLEAR and LOAD switches. A bit of logic would be needed to detect /CLEAR=0 and /LOAD=1. Unfortunately, they aren't on the 25-pin connector."

"Or, you can just use an RC network to RESET. Resistor from Q to 74LS393 RESET, and capacitor from RESET to ground. Q is normally low after reset. To clock the counter, pulse it high, then immediately back low. The RC network keeps the 74LS393 from ever seeing the high. To reset the counter, set Q high and leave it there for a couple RC time constants. Note that the 74LS393 will clock as soon as Q is set ack low, so get your data for address 0000, then return it low (advancing to 0001)." - Lee Hart, June 2012

My response:

The problem with displaying the outputs during program loading, is of course the output latch gets set with various values. If the counter reset is connected to one of them, that also changes the reset line. Or, as you toggle in the loader program, again the output latch is set with various values while displaying the the loaded values. On the third prototype, I decided to not provide a programmable reset. It's adequate to use a manual button to reset the PROMcart, since it's all a manual operation to USE the PROMcart anyway.

PS: Working with the output port, revealed to me how the output byte was wired: I found that pin 10 corresponded to output data bit D6, because on the Membership card front-panel card, with no input on DB-25 pin 1 (select nybble out), chip U9 outputs bits D4-D7. Review the front panel schematic, and note the wiring of Q4-Q7 versus pins 10, 11, 12, 13. This is deliberate, says Lee Hart, it follows the IBM PC convention for the parallel port.

Lee Hart's considerations and tweaks

On power consumption for the EPROMs; the NMOS parts all seem to draw about 50-100ma active, regardless of memory size. When idle (chip select disabled), they drop to 20-30ma. The CMOS parts vary a lot. Most seem to be an NMOS memory array (fewer transistors) with a little CMOS thrown in around the edges. They draw 20-50ma active, 2-5ma idle.

Then there are a few fully CMOS EPROMs. They draw a pulse of supply current of 10-50ma when first chip-selected, then nearly zero when none of the inputs are changing, or when chip select is high. Examples I have are the 6604, 6654, and National 27C16 and 27C32. So it would be nice to have some way to turn off the EPROM when not in use; otherwise it will dominate the total power consumption. For now, you could provide a switch to cut power to the EPROM. - Lee

Design tweaks: On your [earlier] schematic, add a diode in series with the base of the reset inverter transistor. Or use a little TO-92 cased MOSFET, which won't need the resistor.

Upgrade front panel with ROM/serial

I don't know if it will all fit, but I'm thinking it would be cool to make a card that *replaces the present front panel*. Leave off the 25-pin connector and 74HC256, and replace them with the EPROM socket and 4040, and some kind of small serial connector. You'd still have the switches and LEDs, plus the serial and EPROM. :-) Also, there could be pads to mount a DB-25 to the *edge* of the board, so it doesn't take any space on the board. This connector would be soldered on to plug the board onto an existing Membership Card front panel connector. Don't know if it would all fit, though. - Lee Hart

This page and edited content is copyright Herb Johnson (c) 2014. Contact Herb at, an email address is available on that page..