From "Intel Intellec 4/40 Mod 40 Microcomputer Development System - Reference Manual" Oct 1975 Chapter 3 imm6-28 4040 RAM Memory Module page 41-2 P1 pin list for 4K X 8 RAM board 1 2 3 GROUND 4 GROUND 5 6 7 8 9 10 11 MEMORY ADDRESS 0 from Control Module 12 MEMORY ADDRESS 1 from Control Module 13 MEMORY ADDRESS 2 from Control Module 14 MEMORY ADDRESS 3 from Control Module 15 MEMORY ADDRESS 4 from Control Module 16 MEMORY ADDRESS 5 from Control Module 17 MEMORY ADDRESS 6 from Control Module 18 MEMORY ADDRESS 7 from Control Module 19 MEMORY ADDRESS 8 from Control Module 20 MEMORY ADDRESS 9 from Control Module 21 22 23 DATA OUT 0 [CPU /MEMORY DATA 0] 24 DATA IN 0 from Control Module 25 DATA OUT 1 [CPU /MEMORY DATA 1] 26 DATA IN 1 from Control Module 27 DATA OUT 3 [CPU /MEMORY DATA 3] 28 DATA IN 3 from Control Module 29 DATA OUT 2 [CPU /MEMORY DATA 2] 30 DATA IN 2 from Control Module 31 DATA OUT 5 [CPU /MEMORY DATA 5] 32 DATA IN 5 from Control Module 33 DATA OUT 4 [CPU /MEMORY DATA 4] 34 DATA IN 4 from Control Module 35 DATA OUT 7 [CPU /MEMORY DATA 7] 36 DATA IN 7 from Control Module 37 DATA OUT 6 [CPU /MEMORY DATA 6] 38 DATA IN 6 from Control Module 39-56 not connected 57 /ADDRESS 12 from Control Module 58 MOD SELECT 12 from Control Module 59 ADDRESS 13 60 ADDRESS 12 61 MOD SELECT 13 from Control Module 62 /ADDRESS 13 from Control Module 63 /ADDRESS 14 from Control Module 64 MOD SELECT 14 from Control Module 65 ADDRESS 15 66 ADDRESS 14 67 MOD SELECT 15 from Control Module 68 /ADDRESS 15 from Control Module 69-89 not connected 90 /BYTE2 from Control Module 91 /ADDR STROBE from Control Module 92 /BYTE1 from Control Module 93 MOD ENABLE from Control Module 94 ADDRESS 11 [CPU CHIP SELECT 3] 95 /WRITE-READ [CPU W] from Control Module 96 ADDRESS 10 [CPU CHIP SELECT 2] 97 [CPU /PHI2 CLOCK] 98 [CPU /PHI1 CLOCK] 99 +5 VDC 100 +5 VDC note: J43 TTY wired for 20mA operation All signal inputs outputs are at TTL levels except as noted.