From "Intel Intellec 4/40 Mod 40 Microcomputer Development System - Reference Manual" Oct 1975 Chapter 2 imm4-43 4040 Central Processor Module page 32-33 P1 pin list for MSC 40 CPU board 1 TTY IN to Rear Panel J43 2 /TEST to I/O Connector 3 GROUND 4 GROUND 5 ROM IN #2-1 to Rear Panel Input Connector 6 ROM IN #3-1 to Rear Panel Input Connector 7 ROM IN #0-1 to Rear Panel Input Connector 8 /INTRP ACK to Rear Panel Input Connector 9 ROM IN #2-0 to Rear Panel Input Connector 10 ROM IN #3-0 to PROM/RAM Modules 11 MEMORY ADDRESS 0 to PROM/RAM Modules 12 MEMORY ADDRESS 1 to PROM/RAM Modules 13 MEMORY ADDRESS 2 to PROM/RAM Modules 14 MEMORY ADDRESS 3 to PROM/RAM Modules 15 MEMORY ADDRESS 4 to PROM/RAM Modules 16 MEMORY ADDRESS 5 to PROM/RAM Modules 17 MEMORY ADDRESS 6 to PROM/RAM Modules 18 MEMORY ADDRESS 7 to PROM/RAM Modules 19 CHIP SELECT 0 to Memory and I/O Modules 20 CHIP SELECT 1 to Memory and I/O Modules 21 ROM IN #0-3 to Rear Panel Input Connector 22 /INTERRUPT to Rear Panel Input Connector 23 /MEMORY DATA 0 to PROM/RAM Modules 24 ROM IN #3-3 to Rear Panel Input Connector 25 /MEMORY DATA 1 to PROM/RAM Modules 26 TTY PRINTER Rear Panel J43 27 /MEMORY DATA 3 PROM/RAM Modules 28 ROM IN #0-2 Rear Panel Input Connector 29 /MEMORY DATA 2 PROM/RAM Modules 30 /STOP ACK to Rear Panel Input Connector, Memory Controller 31 /MEMORY DATA 5 PROM/RAM Modules 32 ROM IN #2-2 Rear Panel Input Connector 33 /MEMORY DATA 4 PROM/RAM Modules 34 ROM IN #3-2 Rear Panel Input Connector 35 /MEMORY DATA 7 PROM/RAM Modules 36 /STOP Rear Panel Input Connector, Memory Controller 37 /MEMORY DATA 6 PROM/RAM Modules 38 ROM IN #2-3 Rear Panel Input Connector 39 /RAM OUT #0-0 Rear Panel Output Connector 40 /RAM OUT #1-0 Rear Panel Output Connector 41 /OUT I/O Modules 42 /ENABLE MON PROM to Console Switch 43 -10 VDC Power Supply 44 ROM IN #0-0 Rear Panel Input Connector 45 /CPU RESET Control Module, I/O Connector 46 RAM OUT #1-3 Rear Panel Output Connector 47 /CM—RAM2 to Memory & I/O Modules 48 /CM—RAM3 to Memory & I/O Modules 49 /CM—RAM0 to Memory & I/O Modules 50 /CM—RAM1 to Memory & I/O Modules 51 I/O 1 to Control & I/O Modules 52 I/0 0 to Control & I/O Modules 53 I/O 2 to Control & I/O Module 54 /IN to I/O Modules 55 F/not-L Control Module 56 I/O 3 Control & I/O Modules 57 /RAM OUT # 3-3 to Rear Panel Output Connector 58 /RAM OUT # 3-0 to Rear Panel Output Connector 59 /RAM OUT # 3-1 to Rear Panel Output Connector 60 /RAM OUT # 3-2 to Rear Panel Output Connector 61 /ROM OUT # 0-1 to Rear Panel Output Connector 62 ROM OUT # 0-2 to Rear Panel Output Connector 63 RAM OUT # 2-2 to Rear Panel Output Connector 64 ROM OUT # 0-0 to Rear Panel Output Connector 65 ROM OUT # 0-3 to Rear Panel Output Connector 66 /RAM OUT # 2-3 to Rear Panel Output Connector 67 /RAM OUT # 2-0 to Rear Panel Output Connector 68 /RAM OUT # 2-1 to Rear Panel Output Connector 69 /RAM OUT # 1-2 to Rear Panel Output Connector 70 /RAM OUT # 0-3 to Rear Panel Output Connector 71 ROM OUT # 1-2 to Rear Panel Output Connector 72 /DATA 3 to Control and Memory Modules 73 ROM OUT # 1-0 to Rear Panel Output Connector 74 ROM OUT # 1-1 to Rear Panel Output Connector 75 ROM OUT # 1-3 to Rear Panel Output Connector 76 /DATA 2 to Control and Memory Modules 77 ROM OUT # 3-0 to Rear Panel Output Connector 78 ROM OUT # 3-1 to Rear Panel Output Connector 79 /SYNC to Control and Memory Modules 80 /DATA 1 to Control and Memory Modules 81 ROM OUT # 2-1 to Rear Panel Output Connector 82 ROM OUT # 2-0 to Rear Panel Output Connector 83 /DATA 0 to Control and Memory Modules 84 ROM OUT # 2-2 to Rear Panel Output Connector 85 ROM OUT # 3-2 to Rear Panel Output Connector 86 /ROM OUT # 1-1 to Rear Panel Output Connector 87 ROM OUT # 2-3 to Rear Panel Output Connector 88 /4002 RESET to Control Module 89 READER CONTROL to Rear Panel J43 90 /RAM OUT # 0-2 to Rear Panel Output Connector 91 /RAM OUT # 0-1 to Rear Panel Output Connector 92 ROM OUT # 3-3 to Rear Panel Output Connector 93 /CM-ROM to Control and Memory Modules 94 CHIP SELECT 3 to Control and Memory Modules 95 W to Control Module 96 CHIP SELECT 2 to Control and Memory Modules 97 /PHI2 CLOCK to Control and Memory Modules 98 /PHI1 CLOCK to Control and Memory Modules 99 +5 VDC 100 +5 VDC note: J43 TTY wired for 20mA operation All signal inputs outputs are at TTL levels except as noted.