See the discussion on the Web page for Bill Beech's work with the HP 1650 and this card.
Here is the code snippet that is running on the Intel Multibus 86/30 . Note that the 8086 fetches words, so instructions can be pulled over multiple T0 cycles. T0 is the address write cycle for the next instruction fetch.
Here are the definitions (left to right on the STATE binary column):
RESET READY /INTA ALE /BHE /RD HOLD HLDA /WR /S2 /S1 /S0
I connected all those other pins, but since the 8086 is in maximum mode, the CPU does not generate those signals. They are generated from S0-S2 in a 8288. /INTA, /BHE, HOLD and HLDA are valid, but are not occuring in the current situation. A16-A19 represent S3-S6 when not at T0. Clock is 5 MHz cpu clock (CLK). I sample on the falling edge of the clock.
;*******************************************************
; START UP PROGRAM
0000 START PROC
0000 B8 ---- R MOV AX,DATA ;SETUP SS SEG REG
0003 8E D0 MOV SS,AX
0005 B8 0100 R MOV AX,OFFSET STACKP ;SETUP SP REG
0008 8B E0 MOV SP,AX
000A 8C C8 MOV AX,CS ;SETUP DS REG
000C 8E D8 MOV DS,AX
000E E8 07B1 CALL INIT ;INITIALIZE SBC
ORG 03FF0H
3FF0 EA DB 0EAH
3FF1 0000 R FC00 DW START, 0FC00H
MACHINE 1 - STATE LISTING
Label > ADDR DATA STATE Time
Base > Hex Hex Bin Rel
RR SSS
SD 210
TY
-0016 00000 0000 100000110111 200 ns
-0015 00000 0000 100000110111 200 ns
-0014 00000 0000 100000110111 200 ns
-0013 00000 0000 100000110111 200 ns
-0012 00000 0000 100000110111 200 ns
-0011 00000 0000 100000110111 200 ns
-0010 00000 0000 100000110111 200 ns
-0009 00000 0000 000000110111 200 ns Reset goes low
-0008 00000 0000 000000110111 200 ns
-0007 00000 0000 000000110111 200 ns
-0006 00000 0000 000000110111 200 ns
-0005 00000 0000 000000110111 200 ns
-0004 00000 0000 001000110111 200 ns
-0003 00000 0000 000000110111 200 ns
-0002 FFFF0 FFF0 000001111100 200 ns T0 - address fo fetch instruction from
-0001 2FFF0 FFF0 000000111100 200 ns 2 indicates a fetch from CS
high nibble is S6-S3 when NOT T0
+0000 200EA 00EA 010000111111 200 ns Trigger event RST low, RDY high
data on the bus is EA 00, first 2 bytes from ROM
+0001 200EA 00EA 010001111111 200 ns
+0002 FFFF2 FFF2 010001111100 200 ns T0
+0003 2FFF2 FFF2 000100111100 200 ns
+0004 20000 0000 010000111111 200 ns
+0005 20000 0000 011101111111 200 ns
+0006 FFFF4 FFF4 010001111100 200 ns T0
+0007 2FFF4 FFF4 001100111100 200 ns
+0008 200FC 00FC 011100111111 200 ns
+0009 200FC 00FC 010001111111 200 ns
+0010 FFFF6 FFF6 010001111100 200 ns T0 prefetch next instruction in sequence
+0011 2FFF6 FFF6 001100111100 200 ns
+0012 20000 0000 010000111111 200 ns S2-S0 = 7, internal operation -
CPU processing jump far
+0013 20000 0000 010001111111 200 ns
+0014 20000 0000 010001111111 200 ns
+0015 20000 0000 010001111111 200 ns
+0016 20000 0000 011001111111 200 ns
+0017 20000 0000 010001111111 200 ns
+0018 FC000 C000 010001111100 200 ns T0 Low memory FC00:0
+0019 2C000 C000 000000111100 200 ns
+0020 200B8 00B8 010000111111 200 ns
+0021 200B8 00B8 010001111111 200 ns
+0022 FC002 C002 010001111100 200 ns T0
+0023 2C002 C002 000100111100 200 ns
+0024 28E40 8E40 010000111111 200 ns
+0025 28E40 8E40 011101111111 200 ns
+0026 FC004 C004 010001111100 200 ns T0
+0027 2C004 C004 001100111100 200 ns
+0028 2B8D0 B8D0 010100111111 200 ns
+0029 2B8D0 B8D0 010001111111 200 ns
+0030 FC006 C006 010001111100 200 ns T0
+0031 2C006 C006 001100111100 200 ns
+0032 20100 0100 010100111111 200 ns
+0033 20100 0100 010001111111 200 ns
MACHINE 1 - STATE LISTING Page02
Label > ADDR DATA STATE Time
Base > Hex Hex Bin Rel
+0034 FC008 C008 010001111100 200 ns T0
+0035 2C008 C008 001100111100 200 ns
+0036 2E08B E08B 011100111111 200 ns
+0037 2E08B E08B 010001111111 200 ns
+0038 FC00A C00A 010001111100 200 ns T0
+0039 2C00A C00A 000100111100 200 ns
+0040 2C88C C88C 011100111111 200 ns
+0041 2C88C C88C 010001111111 200 ns
+0042 FC00C C00C 010001111100 200 ns T0
+0043 2C00C C00C 000100111100 200 ns
+0044 2D88E D88E 011100111111 200 ns
+0045 2D88E D88E 010001111111 200 ns
+0046 FC00E C00E 010001111100 200 ns T0 - call relative instruction
+0047 2C00E C00E 000100111100 200 ns
+0048 2B1E8 B1E8 011100111111 200 ns
+0049 2B1E8 B1E8 010001111111 200 ns
+0050 FC010 C010 010001111100 200 ns T0 - rest of relative offset + next instr
+0051 2C010 C010 000100111100 200 ns
+0052 2BB07 BB07 010000111111 200 ns
+0053 2BB07 BB07 011101111111 200 ns
+0054 FC012 C012 010001111100 200 ns T0 - fetch next just in case
+0055 2C012 C012 001100111100 200 ns
+0056 20436 0436 010000111111 200 ns internal processing of call
+0057 20436 0436 010001111111 200 ns
+0058 20436 0436 010001111111 200 ns
+0059 20436 0436 010001111111 240 ns
+0060 0011F 011F 010001111111 200 ns
+0061 0011F 011F 010001111111 160 ns
+0062 0011F 011F 011001111111 200 ns
+0063 0011F 011F 010001111111 240 ns
+0064 FC7C2 C7C2 010001111100 160 ns T0 - address of call
+0065 2C7C2 C7C2 000000111100 240 ns
+0066 232FA 32FA 010000111111 200 ns read next instruction
+0067 232FA 32FA 010001111111 160 ns
+0068 400FE 00FE 010001111110 240 ns Write to SP:00FE S6-S3 = 4 is SP
+0069 10011 0011 000001111110 160 ns Loose RDY and die
+0070 10011 0011 000001111110 240 ns
+0071 10011 0011 000001111110 200 ns
+0072 10011 0011 000001111110 200 ns
+0073 10011 0011 000001111110 200 ns
+0074 10011 0011 000001111110 200 ns
+0075 10011 0011 000001111110 200 ns
+0076 10011 0011 000001111110 200 ns
+0077 10011 0011 000001111110 200 ns
+0078 10011 0011 000001111110 200 ns
+0079 10011 0011 000001111110 200 ns
+0080 10011 0011 000001111110 200 ns
+0081 10011 0011 000001111110 200 ns
+0082 10011 0011 000001111110 200 ns
+0083 10011 0011 000001111110 200 ns